DN2. 82x 2/4チャネル、デジタイザ　250MS/s,16ビット、500 MS/s,14ビット、AWG　1.25GS/s, 625MS/s,16ビット　

hybridrNETBOX DN2. 82x 2/4チャネル デジタイザ 250MS/s,16ビット 500 MS/s,14ビット AWG 1.25GS/s, 625MS/s,16ビット ➢ Gbitイーサネット接続 ➢ Host PCによるリモートコントロール ➢ 転送速度：100MB/s ➢ 2/4チャネル ➢ デジタイザ 250MS/s,16ビット 500 MS/s,14ビット ➢ AWG 1.25GS/s, 625MS/s,16ビット ➢ データメモリ：2Gサンプル ➢ デジタイザ：6入力レンジ（±200mV～±10V) ➢ 機能 : マルチレコーディング、Gstedレコーディング、繰り返し出力、タイムスタンプ、シーケンス出力 ➢ AWGの最大出力電圧 822-02 825-02 ±4 V（高インピーダンス負荷時）、±2 V (50Ω負荷時） 822-04 825-04 ±5 V（高インピーダンス負荷時）、±2.5 V (50Ω負荷時） 製品名 分解能 出力チャネル数 入力チャネル数 分解能 サンプリングレート DN2.822-02 16 2 2 16 デジタイザ 250 MS/s AWG 1.25 GS/s DN2.822-04 16 4 4 16 デジタイザ 250 MS/s AWG 1.25 GS/s DN2.825-02 16 2 2 デジタイザ デジタイザ 14 250 MS/s AWG AWG 16 1.25 GS/s DN2.825-04 16 4 4 デジタイザ デジタイザ 14 250 MS/s AWG AWG 16 1.25 GS/s

DN2.82x - hybridNETBOX up to 500 MS/s Digitizer and 1.25 GS/s AWG • Stimulus-Response, Closed-Loop, Recorder/Replay, Automated Tests, MIMO, ... • 2 or 4 channels Digitizer with 180 MS/s up to 500 MS/s • 2 or 4 channels AWG with 625 MS/s up to 1.25 GS/s • Simultaneously sampling and generation on all channels • 2 GSample acquisition and 2 GSample AWG memory • Digitizer: separate ADC and amplifier per channel • Digitizer: 6 input ranges: ±200 mV up to ±10 V • Digitizer: programmable input offset of ±100% • AWG: output into 50 Ohm up to ±2.5 V (4 channels) or ±2 V (2 channels) • AWG: output into 1 MOhm up to ±5 V (4 channels) or ±4 V (2 channels) • Streaming, Multiple Recording, Gated Sampling, Timestamps, Sequence Replay • Ethernet Remote Instrument • Direct Connection to PC/Laptop • LXI Core 2011 compatible • Connect anywhere in company LAN • GBit Ethernet Interface • Embedded Webserver for Maintenance/Updates • Sustained streaming mode up to 70 MB/s • Embedded Server option for open Linux platform Operating Systems SBench 6 Professional Included Drivers • Windows 7 (SP1), 8, 10, • Acquisition, Generation and Display of analog and • LabVIEW, MATLAB, LabWindows/CVI Server 2008 R2 and newer digital data • Visual C++, C++ Builder, GNU C++, • Linux Kernel 2.6, 3.x, 4.x, 5.x • Calculation, FFT VB.NET, C#, J#, Delphi, Java, Python • Windows/Linux 32 and 64 bit • Documentation and Import, Export • IVI SBench 6 can only operate the cards independently by starting two instances of the program Digitizer Arbitrary Waveform Generator General Information Model Channels Res. Sampling Channels Res. Sampling Output Rate Rate Level The hybridNETBOX DN2.82x series internally consists DN2.822-02 2 channels 16 bit 250 MS/s 2 channels 16 bit 1.25 GS/s ±2.0V (50Ω) of a Digitizer and an AWG that can run together or in- DN2.822-04 4 channels 16 bit 250 MS/s 4 channels 16 bit 625 MS/s ±2.5V (50Ω) dependently. That allows simultaneous data genera- DN2.825-02 2 channels 14 bit 500 MS/s 2 channels 16 bit 1.25 GS/s ±2.0V (50Ω) tion and data acquisition for stimulus-response tests, DN2.825-04 4 channels 14 bit 500 MS/s 4 channels 16 bit 625 MS/s ±2.5V (50Ω) ATE applications, MIMO applications or closed-loop applications. The hybridNETBOX can be installed any- Export-Versions where in the company LAN and can be remotely con- Sampling rate limited versions that do not fall under export restrictions. trolled from a host PC. DN2.827-02 2 channels 16 bit 180 MS/s 2 channels 16 bit 1.25 GS/s ±2.0V (50Ω) DN2.827-04 4 channels 16 bit 180 MS/s 4 channels 16 bit 625 MS/s ±2.5V (50Ω) Synchronization is done externally with the help of DN2.828-02 2 channels 14 bit 400 MS/s 2 channels 16 bit 1.25 GS/s ±2.0V (50Ω) clock/trigger-output to clock/trigger-input connection DN2.828-04 4 channels 14 bit 400 MS/s 4 channels 16 bit 625 MS/s ±2.5V (50Ω)SPECTRUM INSTRUMENTATION GMBH · AHRENSFELDER WEG 13-17 · 22927 GROSSHANSDORF · GERMANY 26.1.2021 PHONE: +49 (0)4102-6956-0 · FAX: +49 (0)4102-6956-66 · E-MAIL: info@spec.de · INTERNET: www.spectrum-instrumentation.com

common measurement functions reducing the time needed to learn a new IVI instrument. Software Support The Spectrum products to be accessed with the IVI driver can be lo- Windows Support cally installed data acquisition cards, remotely installed data acqui- The digitizerNETBOX/generatorNETBOX/hybridNETBOX can be sition cards or remote LXI instruments like accessed from Windows 7, Windows 8,Windows 10 (each 32 bit digitizerNETBOX/generatorNETBOX. To maximize the compatibil- and 64 bit). Programming examples for Visual C++, C++ Builder, ity with existing IVI based software installations, the Spectrum IVI LabWindows/CVI, Delphi, Visual Basic, VB.NET, C#, J#, Python, driver supports IVI Scope, IVI Digitizer and IVI FGen class with IVI- Java and IVI are included. C and IVI-COM interfaces. Linux Support Third-party Software Products The digitizerNETBOX/generatorNET- Most popular third-party software products, such as LabVIEW, BOX/hybridNETBOX can be accessed from any Linux MATLAB or LabWindows/CVI are supported. All drivers come system. The Linux support includes SMP systems, 32 bit with examples and detailed documentation. and 64 bit systems, versatile programming examples for Gnu C++, Python as well as drivers for MATLAB for Linux. Embedded Webserver SBench 6, the powerful data acquisition and analysis software from The integrated webserver Spectrum is also included as a Linux version. follows the LXI standard and gathers information Discovery Protocol on the product, set up of The Discovery function the Ethernet configuration helps you to find and and current status. It also identify any Spectrum LXI allows the setting of a con- instruments, like the figuration password, ac- digitizerNETBOX and cess to documentation generatorNETBOX, avail- and updating of the com- able to your computer on the network. The Discovery function will plete instrument firmware, also locate any Spectrum card products that are managed by an including the embedded installed Spectrum Remote Server somewhere on the network. remote server and the webserver. After running the discovery function the card information is cached and can be directly accessed by SBench 6. Furthermore the quali- fied VISA address is returned and can be used by any software to access the remote instrument. SBench 6 Professional The digitizerNETBOX, generator- NETBOX and hybridNETBOX can be used with Spectrum’s powerful software SBench 6 – a Profession- al license for the software is al- ready installed in the box. SBench 6 supports all of the standard fea- tures of the instrument. It has a va- riety of display windows as well as analysis, export and documen- tation functions. • Available for Windows Windows 7, Windows 8, Windows 10 and Linux • Easy to use interface with drag and drop, docking windows and context menus • Display of analog and digital data, X-Y display, frequency domain and spread signals • Designed to handle several GBytes of data • Fast data preview functions • SBench 6 only supports either AWG or Digitizer in one pro- gram • Star-Hub for mixed mode applications is not supported • To run AWG and Digitizer with SBench 6, the software needs to be started twice and each instance of the program then oper- ates independetly one device IVI Driver The IVI standards define an open driver architecture, a set of instru- ment classes, and shared software components. Together these pro- vide critical elements needed for instrument interchangeability. IVI's defined Application Programming Interfaces (APIs) standardize

DC Power Supply Option General Hardware features and options The digitizerNETBOX/generatorNET-BOX can be equipped with an internal DC power supply which replaces the LXI Instrument standard AC power supply. Two dif- The digitizerNETBOX and ferent power supply options are avail- generatorNETBOX are fully able that range from 9V to 36V. LXI instrument compatible Contact the sales team if other DC lev- to LXI Core 2011 following els are required. the LXI Device Specification 2011 rev. 1.4. The digitizerNETBOX/generatorNETBOX has been Using the DC power supply the digitiz- tested and approved by the LXI Consortium. erNETBOX/generatorNETBOX can be used for mobile applications together with a Laptop in automotive or airborne applications. Located on the front panel is the main on/off switch, LEDs showing the LXI and Acquisition status and the LAN reset switch. Option Embedded Server The option turns the digitizer- Chassis features NETBOX/generatorNETBOX The chassis is especially in a powerful PC that allows to desigend for usage in dif- run own programs on a small ferent application arreas and remote data acquisition and has some advanced system. The digitizerNET- features for mobile and BOX/generatorNETBOX is en- shared usage: hanced by more memory, a powerful CPU, a freely accessable internal SSD and a remote software development access method. • stable metal chassis • 8 bumper edges protect the chassis, the desk and other compo- The digitizerNETBOX/generatorNETBOX can either run connected nents on it. The bumper edges allow to store the chassis either to LAN or it can run totally independent, storing data to the internal vertically or horizontally and the lock-in structure allows to stack SSD. The original digitizerNETBOX/generatorNETBOX remote in- multiple chassis with a secure fit onto each other. For 19“ rack strument functionality is still 100 % available. Running the embed- mount montage the bumpers can be unmounted and replaced ded server option it is possible to pre-calculate results based on the by the 19“ rack mount option acquired data, store acquisitions locally and to transfer just the re- • The handle allows to easily carry the chassis around in juts one quired data or results parts in a client-server based software struc- hand. ture. A different example for the • A standard GND screw on the back of the chassis allows to con- digitizerNETBOX/generatorNETBOX embedded server is surveil- nect the metal chassis to measurement ground to reduce noise lance/logger application which can run totally independent for based on ground loops and ground level differences. days and send notification emails only over LAN or offloads stored data as soon as it’s connected again. Front Panel Standard BNC connectors are used Access to the embedded server is done through a standard text for all analog input or output sig- based Linux shell based on the ssh secure shell. nals and all auxiliary signals like clock and trigger. No special External clock I/O adapter cables are needed and the Using a dedicated connector a sampling clock can be fed in from connection is secure even when an external system. It’s also possible to output the internally used used in a moving environment. sampling clock to synchronise external equipment to this clock. Custom front panels are available Reference clock on request even for small series, be it SMA, LEMO connectors or custom specific connectors. The option to use a precise external reference clock (normally 10 MHz) is nec- Ethernet Connectivity essary to synchronize the The GBit Ethernet connection can be instrument for high-quality used with standard COTS Ethernet measurements with external equipment (like a signal source). It’s cabling. The integration into a stan- also possible to enhance the quality of the sampling clock in this dard LAN allows to connect the way. The driver automatically generates the requested sampling digitizerNETBOX/generatorNET- clock from the fed in reference clock. BOX either directly to a desktop PC or Laptop or it is possible to place Export Versions the instrument somewhere in the company LAN and access it from any desktop over the LAN. Special export versions of the products are available that do not fall under export control. Products fall under export control if their spec- ification exceeds certain sampling rates at a given A/D resolution Boot on Power Option and if the product is shipped into a country where no general ex- The digitizerNETBOX/generatorNETBOX can be factory config- port authorization is in place. ured to automatically start and boot upon availability of the input power rail. That way the instrument will automatically become The export versions of the products have a sampling rate limitation available again upon loss of input power. matching the export control list. An upgrade to the faster version is not possible. The sampling rate limitation is in place for both inter- nal and external clock.

External trigger input All boards can be triggered using up to two external analog or dig- Digitizer Hardware Features and Options ital signals. One external trigger input has two analog comparators that can define an edge or window trigger, a hysteresis trigger or Input Amplifier a rearm trigger. The other input has one comparator that can be The analog inputs can be adapt- used for standard edge and level triggers. ed to real world signals using a wide variety of settings that are Multiple Recording individual for each channel. By The Multiple Recording using software commands the in- mode allows the recording of put termination can be changed several trigger events with an between 50 Ohm and 1 MOhm, one can select a matching input extremely short re-arming range and the signal offset can be compensated by programmable time. The hardware doesn’t AC coupling. The latest hardware revisions additionally allow for need to be restarted in be- offset compensation for DC-coupled inputs as well. tween. The on-board memory is divided in several segments of the same size. Each of them is filled with data if a trigger event occurs. Software selectable input path Pre- and posttrigger of the segments can be programmed. The num- For each of the analog channels the user has the choice between ber of acquired segments is only limited by the used memory and two analog input paths. The „Buffered“ path offers the highest flex- is unlimited when using FIFO mode. ibility when it comes to input ranges and termination. A software programmable 50 Ohm and 1 MOhm termination also allows to Gated Sampling connect standard oscilloscope probes to the card. The „50 Ohm“ The Gated Sampling mode path on the other hand provides the highest bandwidth and the best allows data recording con- signal integrity with a fewer number of input ranges and a fixed 50 trolled by an external gate Ohm termination. signal. Data is only record- ed if the gate signal has a Software selectable lowpass filter programmed level. In addi- Each analog channel contains a software selectable low-pass filter tion a pre-area before start to limit the input bandwidth. Reducing the analog input bandwidth of the gate signal as well as a post area after end of the gate signal results in a lower total noise and can be useful especially with low can be acquired. The number of gate segments is only limited by voltage input signals. the used memory and is unlimited when using FIFO mode. Automatic on-board calibration Timestamp All of the channels are calibrated in factory before the board is The timestamp function shipped. To compensate for different variations like PC power sup- writes the time positions of ply, temperature and aging, the software driver provides routines the trigger events in an extra for an automatic onboard offset and gain calibration of all input memory. The timestamps are ranges. All the cards contain a high precision on-board calibration relative to the start of record- reference. ing, a defined zero time, ex- ternally synchronized to a radio clock, an IRIG-B a GPS receiver. Ring buffer mode Using the external synchronization gives a precise time relation for The ring buffer mode is the acquisitions of systems on different locations. standard mode of all oscillo- scope instruments. Digitized ABA mode data is continuously written The ABA mode com- into a ring memory until a bines slow continuous trigger event is detected. After the trigger, post-trigger samples are data recording with fast recorded and pre-trigger samples can also be stored. The number acquisition on trigger of pre-trigger samples available simply equals the total ring mem- events. The ABA mode ory size minus the number of post trigger samples. works like a slow data logger combined with a FIFO mode fast digitizer. The exact The FIFO mode is designed for continuous data transfer between re- position of the trigger events is stored as timestamps in an extra mote instrument and PC memory or hard disk. The control of the memory. data stream is done automatically by the driver on interrupt request. The complete installed on-board memory is used for buffer data, Boxcar Average (high-resolution) mode making the continuous streaming extremely reliable. The Boxcar average or high- resolution mode is a form of Channel trigger averaging. The ADC over- The data acquisition instruments offer a wide variety of trigger samples the signal and aver- modes. Besides the standard signal checking for level and edge as ages neighboring points known from oscilloscopes it’s also possible to define a window trig- together. This mode uses a ger. All trigger modes can be combined with the pulsewidth trigger. real-time boxcar averaging This makes it possible to trigger on signal errors like too long or too algorthm that helps reducing short pulses. In addition to this a re-arming mode (for accurate trig- random noise. It also can ger recognition on noisy signals) the AND/OR conjunction of dif- yield a higher number of bits of resolution depening on the signal ferent trigger events is possible. As a unique feature it is possible to acquired. The averaging factor can be set in the region of 2 to 256. use deactivated channels as trigger sources. Averaged samples are stored as 32 bit values and can be pro- cessed by any software. The trigger detection is still running with

full sampling speed allowing a very precise relation between ac- Multiple Replay quired signal and the trigger. The Multiple Replay mode al- lows the fast output genera- Firmware Option Block Average tion on several trigger events The Block Average Module im- without restarting the hard- proves the fidelity of noisy re- ware. With this option very petitive signals. Multiple fast repetition rates can be repetitive acquisitions with achieved. The on-board memory is divided into several segments of very small dead-time are accu- the same size. Each segment can contain different data which will mulated and averaged. Ran- then be played with the occurrence of each trigger event. dom noise is reduced by the averaging process improving Gated Replay the visibility of the repetitive signal. The complete averaging pro- The Gated Sampling mode al- cess is done inside the FPGA of the digitizer generating no CPU lows data replay controlled load at all. The amount of data is greatly decreased as well as the by an external gate signal. needed transfer bandwidth is heavily reduced. Data is only replayed if the gate signal has attained a Please see separate data sheet for details on the firmware option. programmed level. Firmware Option Block Statistics (Peak Detect) Sequence Mode The Block Statistics and Peak The sequence Detect Module implements a mode allows to widely used data analysis and split the card reduction technology in hard- memory into sev- ware. Each block is scanned eral data segments of different length. These data segments are for minimum and maximum chained up in a user chosen order using an additional sequence peak and a summary includ- memory. In this sequence memory the number of loops for each seg- ing minimum, maximum, aver- ment can be programmed and trigger conditions can be defined to age, timestamps and position information is stored in memory. The proceed from segment to segment. Using the sequence mode it is complete averaging process is done inside the FPGA of the digitiz- also possible to switch between replay waveforms by a simple soft- er generating no CPU load at all. The amount of data is greatly de- ware command or to redefine waveform data for segments simulta- creased as well as the needed transfer bandwidth is heavily neously while other segments are being replayed. All trigger- reduced. related and software-command-related functions are only working on single cards, not on star-hub-synchrnonized cards. Please see separate data sheet for details on the firmware option. External trigger input AWG Hardware Features and Options All boards can be triggered using up to two external analog or dig- ital signals. One external trigger input has two analog comparators Singleshot output that can define an edge or window trigger, a hysteresis trigger or When singleshot output is activated the data of the on-board mem- a rearm trigger. The other input has one comparator that can be ory is played exactly one time. The trigger source can be either one used for standard edge and level triggers. of the external trigger inputs or the software trigger. After the first trigger additional trigger events will be ignored. Repeated output When the repeated output mode is used the data of the on-board memory is played continuously for a programmed number of times or until a stop command is executed. The trigger source can be ei- ther one of the external trigger inputs or the software trigger. After the first trigger additional trigger events will be ignored. Single Restart replay When this mode is activated the data of the on-board memory will be replayed once after each trigger event. The trigger source can be either the external TTL trigger or software trigger. FIFO mode The FIFO mode is designed for continuous data transfer between PC memory or hard disk and the generation board. The control of the data stream is done automatically by the driver on an interrupt request basis. The complete installed on-board memory is used for buffering data, making the continuous streaming extremely reliable.

hybridNETBOX Technical Data - Digitizer Analog Inputs Resolution 130 MS/s up to 250 MS/s 16 bit (441, 442, 447) 400 MS/s and 500 MS/s 14 bit (445, 448) Input Type Single-ended ADC Differential non linearity (DNL) ADC only ±0.5 LSB (14 Bit ADC), ±0.4 LSB (16 Bit ADC) ADC Integral non linearity (INL) ADC only ±2.5 LSB (14 Bit ADC), ±10.0 LSB (16 Bit ADC) ADC Word Error Rate (WER) max. sampling rate 10-12 Channel selection software programmable 1, 2, or 4 (maximum is model dependent) Bandwidth filter activate by software 20 MHz bandwidth with 3rd order Butterworth filtering Input Path Types software programmable 50 Ω (HF) Path Buffered (high impedance) Path Analog Input impedance software programmable 50 Ω 1 MΩ || 25 pF or 50 Ω Input Ranges software programmable ±500 mV, ±1 V, ±2.5 V, ±5 V ±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V, ±10 V Programmable Input Offset Frontend HW-Version < V9 not available not available Programmable Input Offset Frontend HW-Version >= V9 –100%..0% on all ranges –100%..0% on all ranges except ±1 V and ±10 V Input Coupling software programmable AC/DC AC/DC Offset error (full speed) after warm-up and calibration < 0.1% of range < 0.1% of range Gain error (full speed) after warm-up and calibration < 1.0% of reading < 1.0% of reading Over voltage protection range ≤ ±1V 2 Vrms ±5 V (1 MΩ), 5 Vrms (50 Ω) Over voltage protection range ≥ ±2V 6 Vrms ±30 V (1 MΩ), 5 Vrms (50 Ω) Max DC voltage if AC coupling active ±30 V ±30 V Relative input stage delay Bandwidth filter disabled: 0 ns Bandwidth filter disabled: 3.8 ns Bandwidth filter enabled: 14.7 ns Bandwidth filter enabled: 18.5 ns Crosstalk 1 MHz sine signal range ±1V ≤96 dB ≤93 dB Crosstalk 20 MHz sine signal range ±1V ≤82 dB ≤82 dB Crosstalk 1 MHz sine signal range ±5V ≤97 dB ≤85 dB Crosstalk 20 MHz sine signal range ±5V ≤82 dB ≤82 dB Trigger Available trigger modes software programmable Channel Trigger, External, Software, Window, Pulse, Re-Arm, Spike, Or/And, Delay Trigger level resolution software programmable 14 bit Trigger Available trigger modes software programmable Channel Trigger, External, Software, Window, Re-Arm, Or/And, Delay, PXI (M4x only) Channel trigger level resolution software programmable 14 bit Trigger engines 1 engine per channel with two individual levels, 2 external triggers Multi Purpose I/O lines (front-plate) Number of multi purpose lines three, named X0, X1, X2 Input: available signal types software programmable Asynchronous Digital-In, Synchronous Digital-In, Timestamp Reference Clock Input: impedance 10 kΩ to 3.3 V Input: maximum voltage level -0.5 V to +4.0 V Input: signal levels 3.3 V LVTTL Input: bandwith 125 MHz Output: available signal types software programmable Asynchronous Digital-Out, Trigger Output, Run, Arm, PLL Refclock, System Clock Output: impedance 50 Ω Output: signal levels 3.3 V LVTTL Output: type 3.3V LVTTL, TTL compatible for high impedance loads Output: drive strength Capable of driving 50 Ω loads, maximum drive strength ±48 mA Output: update rate 14bit or 16 bit ADC resolution sampling clock Output: update rate 7 bit or 8 bit ADC resolution Current sampling clock < 1.25 GS/s : sampling clock Current sampling clock > 1.25 GS/s and < 2.50 GS/s : ½ sampling clock Current sampling clock > 2.50 GS/s and < 5.00 GS/s : ¼ sampling clock M4i.441x M4i.442x M4i.445x M4i.447x M4i.448x M4x.441x M4x.442x M4x.445x M4x.447x M4x.448x DN2.441-xx DN2.442-xx DN2.445-xx DN2.447-xx DN2.448-xx DN6.441-xx DN6.442-xx DN6.445-xx DN6.447-xx DN6.448-xx ADC Resolution 16 bit 16 bit 14 bit 16 bit 14 bit max sampling clock 130 MS/s 250 MS/s 500 MS/s 180 MS/s 400 MS/s min sampling clock (standard clock mode) 3.814 kS/s 3.814 kS/s 3.814 kS/s 3.814 kS/s 3.814 kS/s min sampling clock (special clock mode) 0.610 kS/s 0.610 kS/s 0.610 kS/s 0.610 kS/s 0.610 kS/s

RMS Noise Level (Zero Noise), typical figures M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V Voltage resolution 24.4 µV 61.0 µV 122.1 µV 244.1 µV 305.2 µV 610.4 µV 1.22 mV HF path, DC, fixed 50 Ω <1.9 LSB <116 µV <1.9 LSB <232 µV <1.9 LSB <580 µV <1.9 LSB <1.16 mV Buffered path, full bandwidth <3.8 LSB <93 µV <2.7 LSB <165 µV <2.1 LSB <256 µV <3.8 LSB <928 µV <2.7 LSB <1.65 mV <2.0 LSB <2.44 mV Buffered path, BW limit active <2.2 LSB <54 µV <2.0 LSB <122 µV <2.0 LSB <244 µV <3.2 LSB <781 µV <2.3 LSB <1.40 mV <2.0 LSB <2.44 mV M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 76.3 µV 152.6 µV 305.2 µV HF path, DC, fixed 50 Ω <6.9 LSB <53 µV <6.9 LSB <211 µV <6.9 LSB <526 µV <6.9 LSB <1.05 mV Buffered path, full bandwidth <11 LSB <67 µV <7.8 LSB <119 µV <7.1 LSB <217 µV <12 LSB <732 µV <8.1 LSB <1.24 mV <7.1 LSB <2.17 mV Buffered path, BW limit active <7.9 LSB <48 µV <7.0 LSB <107 µV <6.9 LSB <211 µV <9.8 LSB <598 µV <7.2 LSB <1.10 mV <7.1 LSB <2.17 mV M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V Voltage resolution (1) 6.1 µV 15.3 µV 30.5 µV 61.0 µV 76.3 µV 152.6 µV 305.2 µV HF path, DC, fixed 50 Ω <5.9 LSB <90 µV <5.9 LSB <180 µV <5.9 LSB <450 µV <5.9 LSB <900 µV Buffered path, full bandwidth <8.5 LSB <52 µV <6.5 LSB <99 µV <5.9 LSB <180 µV <11 LSB <671 µV <7.0 LSB <1.07 mV <6.1 LSB <1.86 mV Buffered path, BW limit active <7.0 LSB <43 µV <6.1 LSB <93 µV <5.9 LSB <180 µV <9.6 LSB <586 µV <6.7 LSB <1.02 mV <6.1 LSB <1.86 mV Dynamic Parameters M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW Test signal frequency 10 MHz 40 MHz 70 MHz 10 MHz 10 MHz 40 MHz 70 MHz Input Range ±500mV ±1V ±2.5V ±5V ±1V ±1V ±200mV ±500mV ±1V ±500mV ±500mV ±500mV THD (typ) (dB <-75.9 dB <-75.8 dB <-75.2 dB <-74.8 dB <-72.5 dB <-67.4 dB <-71.4 dB <-72.1 dB <-68.6 dB <-65.0 dB <-58.6 dB <-54.4 dB SNR (typ) (dB) >67.8 dB >67.9 dB >68.0 dB >68.0 dB >69.5 dB >67.5 dB >67.5 dB >68.0 dB >68.1 dB >67.3 dB >65.8 dB >65.6 dB SFDR (typ), excl. harm. (dB) >88.1 dB >88.6 dB >85.2 dB >85.3 dB >88.0 dB >87.8 dB >87.3 dB >88.4 dB >87.5 dB >89.0 dB >88.9 dB >88.8 dB SFDR (typ), incl. harm. (dB) >80.1 dB >80.0 dB >77.4 dB >77.3 dB >74.0 dB >69.9 dB >78.1 dB >73.5 dB >69.8 dB >67.5 dB >60.8 dB >56.0 dB SINAD/THD+N (typ) (dB) >67.2 dB >67.2 dB >67.2 dB >67.2 dB >67.7 dB >64.4 dB >66.5 dB >66.6 dB >65.3 dB >63.9 dB >57.9 dB >54.0 dB ENOB based on SINAD (bit) >10.9 bit >10.9 bit >10.9 bit >10.9 bit >10.9 bit >10.4 bit >10.7 bit >10.8 bit >10.6 bit >10.3 bit >9.3 bit >8.7 bit ENOB based on SNR (bit) >11.0 bit >11.0 bit >11.0 bit >11.0 bit >11.0 bit >10.9 bit >10.9 bit >11.0 bit >11.0 bit >10.9 bit >10.6 bit >10.6 bit M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW Test signal frequency 1 MHz 10 MHz 40 MHz 10 MHz 1 MHz 10 MHz 40 MHz Input Range ±1V ±500mV ±1V ±2.5V ±5V ±1V ±200mV ±500mV ±1V ±500mV ±500mV ±500mV THD (typ) (dB <-73.1 dB <-74.0 dB <-74.1 dB <-74.1 dB <-74.1 dB <-62.9 dB <-73.2 dB <-71.5 dB <-69.0 dB <-72.2 dB <-67.5 dB <49.8 dB SNR (typ) (dB) >71.9 dB >71.5 dB >71.5 dB >71.6 dB >71.6 dB >71.8 dB >69.8 dB >71.0 dB >71.2 dB >71.7 dB >71.0 dB >69.0 dB SFDR (typ), excl. harm. (dB) >92.1 dB >90.4 dB >90.8 dB >90.1 dB >89.7 dB >90.2 dB >92.1 dB >92.0 dB >92.1 dB >90.0 dB >91.4 dB >92.5 dB SFDR (typ), incl. harm. (dB) >74.4 dB >75.4 dB >75.5 dB >75.5 dB >75.5 dB >64.5 dB >75.0 dB >73.1 dB >69.8 dB >74.7 dB >67.8 dB >50.0 dB SINAD/THD+N (typ) (dB) >69.8 dB >69.6 dB >69.6 dB >69.6 dB >69.6 dB >62.2 dB >68.5 dB >68.2 dB >67.0 dB >68.8 dB >66.4 dB >48.9 dB ENOB based on SINAD (bit) >11.3 bit >11.2 bit >11.2 bit >11.3 bit >11.3 bit >10.0 bit >11.1 bit >11.0 bit >10.8 bit >11.1 dB >10.7 bit >7.8 bit ENOB based on SNR (bit) >11.7 bit >11.6 bit >11.6 bit >11.6 bit >11.6 bit >11.6 dB >11.3 bit >11.5 bit >11.5 bit >11.6 dB >11.5 bit >11.2 bit M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW Test signal frequency 1 MHz 10 MHz 10 MHz 1 MHz 10 MHz Input Range ±1V ±500mV ±1V ±2.5V ±5V ±200mV ±500mV ±1V ±500mV ±500mV THD (typ) (dB <-72.6 dB <-77.8 dB <-77.5 dB <-77.3 dB <-77.1 dB <-74.5 dB <-73.9 dB <-70.1 dB <-73.5 dB <73.4 dB SNR (typ) (dB) >72.2 dB >71.8 dB >71.9 dB >72.0 dB >72.0 dB >69.8 dB >71.2 dB >71.3 dB >71.1 dB >71.0 dB SFDR (typ), excl. harm. (dB) >92.4 dB >97.0 dB >96.0 dB >95.2 dB >94.8 dB >89.0 dB >94.0 dB >94.5 dB >88.8 dB >93.5 dB SFDR (typ), incl. harm. (dB) >73.7 dB >78.6 dB >78.2 dB >75.2 dB >75.1 dB >77.6 dB >77.8 dB >71.5 dB >74.7 dB >73.1 dB SINAD/THD+N (typ) (dB) >69.4 dB >70.8 dB >70.8 dB >70.9 dB >70.8 dB >69.0 dB >69.7 dB >68.2 dB >69.2 dB >69.2 dB ENOB based on SINAD (bit) >11.2 bit >11.5 bit >11.5 bit >11.5 bit >11.5 bit >11.2 bit >11.3 bit >11.0 bit >11.2 bit >11.2 bit ENOB based on SNR (bit) >11.7 bit >11.6 bit >11.6 bit >11.6 bit >11.6 bit >11.3 bit >11.5 bit >11.5 bit >11.6 bit >11.6 bit Dynamic parameters are measured at ±1 V input range (if no other range is stated) and 50Ω termination with the samplerate specified in the table. Measured parameters are averaged 20 times to get typical values. Test signal is a pure sine wave generated by a signal generator and a matching bandpass filter. Amplitude is >99% of FSR. SNR and RMS noise parameters may differ depending on the quality of the used PC. SNR = Signal to Noise Ratio, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range, SINAD = Signal Noise and Dis- tortion, ENOB = Effective Number of Bits.

Noise Floor Plots (open inputs) M4i.445x, M4x.445x, M4i.442x, M4x.442x, M4i.441x, M4x.441x, DN2.445-xx, DN6.445-xx DN2.442-xx and DN6.442-xx DN2.441-xx and DN6.441-xx Sampling Rate 500 MS/s Sampling Rate 250 MS/s Sampling Rate 130 MS/s Buffered Path 1 MΩ, AC ±1 V range HF Path 50 Ω, AC ±500 mV Connectors Analog Channels SMA female (one for each single-ended input) Cable-Type: Cab-3mA-xx-xx Clock Input SMA female Cable-Type: Cab-3mA-xx-xx Clock Output SMA female Cable-Type: Cab-3mA-xx-xx Trg0 Input SMA female Cable-Type: Cab-3mA-xx-xx Trg1 Input SMA female Cable-Type: Cab-3mAxx-xx X0/Trigger Output/Timestamp Reference Clock programmable direction SMA female Cable-Type: Cab-3mA-xx-xx X1 programmable direction SMA female Cable-Type: Cab-3mA-xx-xx X2 programmable direction SMA female Cable-Type: Cab-3mA-xx-xx

hybridNETBOX Technical Data - Arbitrary Waveform Generator Analog Outputs Resolution 16 bit D/A Interpolation no interpolation M4i.662x/M4x.662x M4i.663x/M4x.663x high bandwidth version DN2.662/DN6.662x DN2.663/DN6.663 (1.25 GS/s + option -hbw) Output amplitude into 50 Ω termination software programmable ±80 mV up to ±2.5 V ±80 mV up to ±2 V ±80 mV up to ±480 mV Output amplitude into high impedance loads software programmable ±160 mV up to ±5 V ±160 mV up to ±4 V ±160 mV up to ±960 mV Stepsize of output amplitude (50 Ω termination) 1 mV 1 mV 1 mV Stepsize of output amplitude (high impedance) 2 mV 2 mV 2 mV 10% to 90% rise/fall time of 480 mV pulse 1.06 ns 440 ps 10% to 90% rise/fall time of 2000 mV pulse 1.08 ns n.a. Output offset fixed 0 V Output Amplifier Path Selection automatically by driver Low Power path: ±80 mV to ±480 mV (into 50 Ω) High Power path: ±420 mV to ±2.5 V/±2 V (into 50 Ω) Output Amplifier Setting Hysteresis automatically by driver 420 mV to 480 mV (if output is using low power path it will switch to high power path at 480 mV. If output is using high power path it will switch to low power path at 420 mV) Output amplifier path switching time 10 ms (output disabled while switching) Filters software programmable bypass with no filter or one fixed filter DAC Differential non linearity (DNL) DAC only ±0.5 LSB typical DAC Integral non linearity (INL) DAC only ±1.0 LSB typical Output resistance 50 Ω Minimum output load 0 Ω (short circuit safe) Output accuracy Low power path ±0.5 mV ±0.1% of programmed output amplitude High power path ±1.0 mV ±0.2% of programmed output amplitude Trigger Available trigger modes software programmable External, Software, Window, Re-Arm, Or/And, Delay, PXI (M4x only) Trigger edge software programmable Rising edge, falling edge or both edges Trigger delay software programmable 0 to (8GSamples - 32) = 8589934560 Samples in steps of 32 samples Multi, Gate: re-arming time 40 samples Trigger to Output Delay sample rate ≤ 625 MS/s 238.5 sample clocks + 16 ns sample rate > 625 MS/s 476.5 sample clocks + 16 ns Memory depth software programmable 32 up to [installed memory / number of active channels] samples in steps of 32 Multiple Replay segment size software programmable 16 up to [installed memory / 2 / active channels] samples in steps of 16 Trigger accuracy (all sources) 1 sample Minimum external trigger pulse width ≥ 2 samples External trigger Ext0 Ext1 External trigger impedance software programmable 50 Ω /1 kΩ 1 kΩ External trigger coupling software programmable AC or DC fixed DC External trigger type Window comparator Single level comparator External input level ±10 V (1 kΩ), ±2.5 V (50 Ω), ±10 V External trigger sensitivity 2.5% of full scale range 2.5% of full scale range = 0.5 V (minimum required signal swing) External trigger level software programmable ±10 V in steps of 10 mV ±10 V in steps of 10 mV External trigger maximum voltage ±30V ±30 V External trigger bandwidth DC 50 Ω DC to 200 MHz n.a. 1 kΩ DC to 150 MHz DC to 200 MHz External trigger bandwidth AC 50 Ω 20 kHz to 200 MHz n.a. Minimum external trigger pulse width ≥ 2 samples ≥ 2 samples Multi Purpose I/O lines (front-plate) Number of multi purpose lines three, named X0, X1, X2 Input: available signal types software programmable Asynchronous Digital-In Input: impedance 10 kΩ to 3.3 V Input: maximum voltage level -0.5 V to +4.0 V Input: signal levels 3.3 V LVTTL Output: available signal types software programmable Asynchronous Digital-Out, Synchronous Digital-Out, Trigger Output, Run, Arm, Marker Output, System Clock Output: impedance 50 Ω Output: signal levels 3.3 V LVTTL Output: type 3.3V LVTTL, TTL compatible for high impedance loads Output: drive strength Capable of driving 50 Ω loads, maximum drive strength ±48 mA Output: update rate sampling clock

Sequence Replay Mode (Mode available starting with firmware V1.14) Number of sequence steps software programmable 1 up to 4096 (sequence steps can be overloaded at runtime) Number of memory segments software programmable 2 up to 64k (segment data can be overloaded at runtime) Minimum segment size software programmable 384 samples (1 active channel), 192 samples (2 active channels), 96 samples (4 active channels), in steps of 32 samples. Maximum segment size software programmable 2 GS / active channels / number of sequence segments (round up to the next power of two) Loop Count software programmable 1 to (1M - 1) loops Sequence Step Commands software programmable Loop for #Loops, Next, Loop until Trigger, End Sequence Special Commands software programmable Data Overload at runtime, sequence steps overload at runtime, readout current replayed sequence step Limitations for synchronized products Software commands changing the sequence as well as „Loop until trigger“ are not synchronized between cards. This also applies to multiple AWG modules in a generatorNETBOX. Clock Clock Modes software programmable internal PLL, external reference clock, Star-Hub sync (M4i only), PXI Reference Clock (M4x only) Internal clock accuracy ≤ ±20 ppm Internal clock setup granularity 8 Hz (internal reference clock only, restrictions apply to external reference clock) Setable Clock speeds 50 MHz to max sampling clock Clock Setting Gaps 750 to 757 MHz, 1125 to 1145 MHz (no sampling clock possible in these gaps) External reference clock range software programmable ≥ 10 MHz and ≤ 1.25 GHz External reference clock input impedance 50 Ω fixed External reference clock input coupling AC coupling External reference clock input edge Rising edge External reference clock input type Single-ended, sine wave or square wave External reference clock input swing square wave 0.3 V peak-peak up to 3.0 V peak-peak External reference clock input swing sine wave 1.0 V peak-peak up to 3.0 V peak-peak External reference clock input max DC voltage ±30 V (with max 3.0 V difference between low and high level) External reference clock input duty cycle requirement 45% to 55% External reference clock output type Single-ended, 3.3V LVPECL Clock output sampling clock ≤71.68 MHz Clock output = sampling clock/4 Clock output sampling clock >71.68 MHz Clock output = sampling clock/8 Star-Hub synchronization clock modes software selectable Internal clock, external reference clock Clock Limitations M2p.653x M2p.656x DNx.653-xx DNx.656-xx M2p.654x M2p.657x DNx.654-xx DNx.657-xx DNx.803-xx DNx.806-xx DNx.813-xx DNx.816-xx max internal clock (non-synchronized cards) 40 MS/s 125 MS/s min internal clock (non-synchronized cards) 1 kS/s 1 kS/s max internal clock (cards synchronized via star-hub) 40 MS/s 125 MS/s min internal clock (cards synchronized via star-hub) 128 kS/s 128 kS/s max direct external clock 40 MS/s 125 MS/s min direct external clock DC DC min direct external clock LOW time 4 ns 4 ns min direct external clock HIGH time 4 ns 4 ns Bandwidth and Filters Filter - 3dB bandwidth Filter characteristic Analog bandwidth does not include Sinc response of DAC Filter 0 70 MHz third-order Butterworth Filter 1 20 MHz fifth-order Butterworth Filter 2 5 MHz fourth-order Bessel Filter 3 1 MHz fourth-order Bessel

Dynamic Parameters M2p.653x/DNx.653-xx/DNx.803-xx Test - Samplerate 40 MS/s 40 MS/s Output Frequency 800 kHz 4 MHz Output Level in 50 Ω ±900mV ±3000mV ±900mV ±3000mV Used Filter 1 MHz 5 MHz NSD (typ) -142 dBm/Hz -132 dBm/Hz -142 dBm/Hz -132 dBm/Hz SNR (typ) 90.7 dB 91.1 dB 83.7 dB 84.1 dB THD (typ) -74.0 dB -74.0 dB -70.5 dB -70.5 dB SINAD (typ) 73.9 dB 73.9 dB 69.8 dB 69.8 dB SFDR (typ), excl harm. 97.0 dB 95.0 dB 88.0 dB 88.0 dB ENOB (SINAD) 12.0 12.0 11.3 11.3 ENOB (SNR) 14.7 14.8 13.5 13.6 M2p.654x/DNx.654-xx/DNx.813-xx Test - Samplerate 40 MS/s 40 MS/s Output Frequency 800 kHz 4 MHz Output Level in 50 Ω ±900mV ±6000mV ±900mV ±6000mV Used Filter 1 MHz 5 MHz NSD (typ) -138 dBm/Hz -129 dBm/Hz -142 dBm/Hz -126 dBm/Hz SNR (typ) 86.7 dB 88.1 dB 83.7 dB 84.2 dB THD (typ) -74.0 dB -74.0 dB -74.0 dB -74.0 dB SINAD (typ) 73.8 dB 73.8 dB 73.6 dB 73.6 dB SFDR (typ), excl harm. ENOB (SINAD) 12.0 12.0 11.9 11.9 ENOB (SNR) 14.1 14.3 13.6 13.7 M2p.656x/DNx.656-xx/DNx.806-xx Test - Samplerate 125 MS/s 125 MS/s 125 MS/s Output Frequency 800 kHz 4 MHz 16 MHz Used Filter 1 MHz 5 MHz 20 MHz Output Level in 50 Ω ±900mV ±3000mV ±900mV ±3000mV ±900mV ±3000mV NSD (typ) -142 dBm/Hz -132 dBm/Hz -142 dBm/Hz -132 dBm/Hz -142 dBm/Hz -132 dBm/Hz SNR (typ) 90.7 dB 91.1 dB 83.7 dB 84.1 dB 77.7 dB 78.1 dB THD (typ) -74.0 dB -74.0 dB -70.5 dB -70.5 dB -66.0 dB -61.9 dB SINAD (typ) 73.9 dB 73.9 dB 69.8 dB 69.8 dB 65.7 dB 60.9 dB SFDR (typ), excl harm. 97.0 dB 95.0 dB 88.0 dB 88.0 dB 90.0 dB 89.0 dB ENOB (SINAD) 12.0 12.0 11.3 11.3 10.6 9.8 ENOB (SNR) 14.7 14.8 13.5 13.6 12.5 12.6 M2p.657x/DNx.657-xx/DNx.816-xx Test - Samplerate 125 MS/s 125 MS/s 125 MS/s Output Frequency 800 kHz 4 MHz 16 MHz Used Filter 1 MHz 5 MHz 20 MHz Output Level in 50 Ω ±900mV ±6000mV ±900mV ±6000mV ±900mV ±6000mV NSD (typ) -138 dBm/Hz -129 dBm/Hz -142 dBm/Hz -126 dBm/Hz -142 dBm/Hz -127 dBm/Hz SNR (typ) 86.7 dB 88.1 dB 83.7 dB 84.2 dB 77.7 dB 79.1 dB THD (typ) -74.0 dB -74.0 dB -74.0 dB -74.0 dB -70.5 dB -63.1 dB SINAD (typ) 73.8 dB 73.8 dB 73.6 dB 73.6 dB 69.7 dB 63.0 dB SFDR (typ), excl harm. ENOB (SINAD) 12.0 12.0 11.9 11.9 11.3 10.2 ENOB (SNR) 14.1 14.3 13.6 13.7 12.6 12.8 THD and SFDR are measured at the given output level and 50 Ohm termination with a high resolution M3i.4860/M4i.4450-x8 data acquisition card and are calculated from the spec- trum. Noise Spectral Density is measured with built-in calculation from an HP E4401B Spectrum Analyzer. All available D/A channels are activated for the tests. SNR and SFDR figures may differ depending on the quality of the used PC. NSD = Noise Spectral Density, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range.

hybridNETBOX Technical Data - General Option digitizerNETBOX/generatorNETBOX embedded server (DN2.xxx-Emb, DN6.xxx-Emb) CPU Intel Quad Core 2 GHz System memory 4 GByte RAM System data storage Internal 128 GByte SSD Development access Remote Linux command shell (ssh), no graphical interface (GUI) available Accessible Hardware Full access to Spectrum instruments, LAN, front panel LEDs, RAM, SSD Integrated operating system OpenSuse 12.2 with kernel 4.4.7. Internal PCIe connection DN2.20, DN2.46, DN2.47, DN2.49, DN2.59, DN2.60, DN2.65 PCIe x1, Gen1 DN6.46, DN6.49, DN6.59, DN6.65, DN2.80, DN2.81 DN2.22, DN2.44, DN2.66 PCIe x1, Gen2 DN6.22, DN6.44, DN6.66, DN2.82 Ethernet specific details LAN Connection Standard RJ45 LAN Speed Auto Sensing: GBit Ethernet, 100BASE-T, 10BASE-T LAN IP address programmable DHCP (IPv4) with AutoIP fall-back (169.254.x.y), fixed IP (IPv4) Sustained Streaming speed DN2.20, DN2.46, DN2.47, DN2.49, DN2.60 up to 70 MByte/s DN6.46, DN6.49 DN2.59, DN2.65, DN2.22, DN2.44, DN2.66 up to 100 MByte/s DN6.59, DN6.65, DN6.22, DN6.44, DN6.66 Used TCP/UDP Ports Webserver: 80 mDNS Daemon: 5353 VISA Discovery Protocol: 111, 9757 UPNP Daemon: 1900 Spectrum Remote Server: 1026, 5025 Power connection details Mains AC power supply Input voltage: 100 to 240 VAC, 50 to 60 Hz AC power supply connector IEC 60320-1-C14 (PC standard coupler) Power supply cord power cord included for Schuko contact (CEE 7/7) Serial connection details (DN2.xxx with hardware ≥ V11) Serial connection (RS232) For diagnostic purposes only. Do not use, unless being instructed by a Spectrum support agent. Certification, Compliance, Warranty EMC Immunity Compliant with CE Mark EMC Emission Compliant with CE Mark Product warranty 5 years starting with the day of delivery Software and firmware updates Life-time, free of charge DN2 specific Technical Data Environmental and Physical Details DN2.xxx Dimension of Chassis without connectors or bumpers L x W x H 366 mm x 267 mm x 87 mm Dimension of Chassis with 19“ rack mount option L x W x H 366 mm x 482.6 mm x 87 mm (2U height) Weight (1 internal acquisition/generation module) 6.3 kg, with rack mount kit: 6.8 kg Weight (2 internal acquisition/generation modules) 6.7 kg, with rack mount kit 7.2 kg Warm up time 20 minutes Operating temperature 0°C to 40°C Storage temperature -10°C to 70°C Humidity 10% to 90% Dimension of packing (single DN2) L x W x H 470 mm x 390 mm x 180 mm Volume weight of Packing (single DN2) 7.0 kgs Power Consumption 230 VAC 12 VDC 24 VDC 2 + 2 channel versions 4 + 4 channel versions 8 + 8 channel versions MTBF MTBF TBD

Block diagram of hybridNETBOX DN2 Block diagram of Digitizer Module hybridNETBOX DN2.82x

Block diagram of AWG Module hybridNETBOX DN2./82x

Order Information The hybridNETBOX is equipped with a large internal memory for data storage and data replay. The internal digitizer supports standard ac- quisition (Scope), FIFO acquisition (streaming), Multiple Recording, Gated Sampling, ABA mode and Timestamps. Then internal AWG sup- ports standard replay, FIFO replay (streaming), Multiple Replay, Gated Replay, Continuous Replay (Loop), Single-Restart as well as Sequence. Operating system drivers for Windows/Linux 32 bit and 64 bit, drivers and examples for C/C++, IVI (Scope, Digitizer and Function Gener- ator class), LabVIEW (Windows), MATLAB (Windows and Linux), .NET, Delphi, Java, Python and a Professional license of the oscilloscope software SBench 6 are included. The system is delivered with a connection cable meeting your countries power connection. Additional power connections with other standards are available as option. hybridNETBOX DN2 - Ethernet/LXI Interface Digitizer AWG Order no. Memory Resolution Speed Resolution Speed Level@50Ω Level@1MΩ DN2.822-02 2 x 2 GSamples 16 Bit 2 x 250 MS/s 16 Bit 2 x 1.25 GS/s ±2.0 V ±4.0 V DN2.822-04 2 x 2 GSamples 16 Bit 4 x 250 MS/s 16 Bit 4 x 625 MS/s ±2.5 V ±5.0 V DN2.825-02 2 x 2 GSamples 14 Bit 2 x 500 MS/s 16 Bit 2 x 1.25 GS/s ±2.0 V ±4.0 V DN2.825-04 2 x 2 GSamples 14 Bit 4 x 500 MS/s 16 Bit 4 x 625 MS/s ±2.5 V ±5.0 V DN2.827-02(1) 2 x 2 GSamples 16 Bit 2 x 180 MS/s 16 Bit 2 x 1.25 GS/s ±2.0 V ±4.0 V DN2.827-04(1) 2 x 2 GSamples 16 Bit 4 x 180 MS/s 16 Bit 4 x 625 MS/s ±2.5 V ±5.0 V DN2.828-02(1) 2 x 2 GSamples 14 Bit 2 x 400 MS/s 16 Bit 2 x 1.25 GS/s ±2.0 V ±4.0 V DN2.828-04(1) 2 x 2 GSamples 14 Bit 4 x 400 MS/s 16 Bit 4 x 625 MS/s ±2.5 V ±5.0 V (1)Export Version OptionsOptions Order no. Option DN2.xxx-Rack 19“ rack mounting set for self mounting DN2.xxx-Emb Extension to Embedded Server: CPU, more memory, SSD. Access via remote Linux secure shell (ssh) DN2.xxx-spavg Signal Processing Firmware Option: Block Average (later installation by firmware - upgrade available) DN2.xxx-spstat Signal Processing Firmware Option: Block Statistics/Peak Detect (later installation by firmware - upgrade available) DN2.xxx-DC12 12 VDC internal power supply. Replaces AC power supply. Accepts 9 V to 18 V DC input. Screw terminals. DN2.xxx-DC24 24 VDC internal power supply. Replaces AC power supply. Accepts 18 V to 36 V DC input. Screw terminals DN2.xxx-BTPWR Boot on Power On: the digitizerNETBOX/generatorNETBOX automatically boots if power is switched on. Services Order no. Option DN2.xxx-Recal Recalibration of complete digitizerNETBOX/generatorNETBOX DN2 including calibration protocol BNC Cables The standard adapter cables are based on RG174 cables and have a nominal attenuation of 0.3 dB/m at 100 MHz. for Connections Connection Length to SMA male to SMA female to BNC male to SMB female All BNC male 80 cm Cab-3mA-9m-80 Cab-3fA-9m-80 Cab-9m-9m-80 Cab-3f-9m-80 All BNC male 200 cm Cab-3mA-9m-200 Cab-3fA-9m-200 Cab-9m-9m-200 Cab-3f-9m-200 Technical changes and printing errors possible SBench, digitizerNETBOX and generatorNETBOX are registered trademarks of Spectrum Instrumentation GmbH. Microsoft, Visual C++, Windows, Windows 98, Windows NT, Window 2000, Windows XP, Windows Vista, Windows 7, Windows 8 and Windows 10 are trademarks/registered trademarks of Microsoft Corporation. LabVIEW, DASYLab, Diadem and LabWindows/CVI are trademarks/registered trademarks of National Instruments Corporation. MATLAB is a trademark/registered trademark of The Mathworks, Inc. Delphi and C++Builder are trademarks/registered trademarks of Embarcadero Technologies, Inc. Keysight VEE, VEE Pro and VEE OneLab are trademarks/registered trademarks of Keysight Technologies, Inc. FlexPro is a registered trademark of Weisang GmbH & Co. KG. PCIe, PCI Express and PCI-X and PCI-SIG are trademarks of PCI-SIG. LXI is a registered trademark of the LXI Consortium. PICMG and CompactPCI are trademarks of the PCI Industrial Computation Manufacturers Group. Oracle and Java are registered trademarks of Oracle and/or its affiliates. Intel and Intel Core i3, Core i5, Core i7, Core i9 and Xeon are trademarks and/or registered trademarks of Intel Corporation. AMD, Opteron, Sempron, Phenom, FX, Ryzen and EPYC are trademarks and/or registered trademarks of Advanced Micro Devices. NVIDIA, CUDA, GeForce, Quadro and Tesla are trademarks/registered trademarks of NVIDIA Corporation.