DN6.44x　14/16ビット、250MS/s, 500MS/s、12～24チャネル

digitizerNETBOX DN6.44x 14/16ビット、130MS/s, 250MS/s, 500MS/s、12～24チャネル FPGAによる主な演算機能オプション ：ブロックアベレージ、ピーク検出 FPGAによる標準k機能 ：ボックスカーアベレージ ・サンプリングレート: 130MS/s, 250MS/s, 500MS/s 12/16/20/24チャネル ・入力抵抗 1MΩ/50Ω ・チャネル毎に独立した14/16ビットADおよびアンプによる全チャネル同時サンプリング ・6入力レンジ：±200mV～±10 V ・トリガ：ウィンドウ、ヒステレシス、OR/AND ・測定モード：シングルショット、Streaming、ABA、マルチレコード、ゲーティドレコード Time Stamp ・PCとの接続：イーサネット 製品名 分解能 入力チャネル サンプリングレート 帯域 DN6.441-12 16 12 130MS/s 65MHz DN2.441-16 16 16 130MS/s 65MHz DN2.441-20 16 20 130MS/s 65MHz DN2.441-24 16 24 130MS/s 65MHz DN6.442-12 16 12 250MS/s 125MHz DN2.442-16 16 16 250MS/s 125MHz DN2.442-20 16 20 250MS/s 125MHz DN2.442-24 16 24 250MS/s 125MHz DN2.445-12 14 12 500MS/s 250MHz DN2.445-16 14 16 500MS/s 250MHz DN2.445-20 14 20 500MS/s 250MHz DN2.445-24 14 24 500MS/s 250MHz

DN6.44x - 24 channel 14/16 bit digitizerNETBOX up to 500 MS/s • 12, 16, 20 or 24 channels with 130 MS/s up to 500 MS/s • Simultaneously sampling on all channels FPGA Options: • Separate ADC and amplifier per channel • Complete on-board calibration • Block Average up to 128k • 6 input ranges: ±200 mV up to ±10 V • Block Statistics/Peak Detect • 6, 8, 10 or 12 GSample standard acquisition memory • Window, re-arm, hysteresis, OR/AND trigger • Features: Single-Shot, Streaming, ABA mode, Multiple Recording, Gated Sampling, Timestamps • Ethernet Remote Instrument • Direct Connection to PC/Laptop • LXI Core 2011 compatible • Connect anywhere in company LAN • GBit Ethernet Interface • Embedded Webserver for Maintenance/Updates • Sustained streaming mode up to 100 MB/s • Embedded Server option for open Linux platform Operating Systems SBench 6 Professional Included Drivers • Windows 7 (SP1), 8, 10, • Acquisition, Generation and Display of analog and • LabVIEW, MATLAB, LabWindows/CVI Server 2008 R2 and newer digital data • C/C++, GNU C++, VB.NET, C#, J#, • Linux Kernel 2.6, 3.x, 4.x, 5.x • Calculation, FFT Delphi, Java, Python • Windows/Linux 32 and 64 bit • Documentation and Import, Export • IVI Model Resolution Single-Ended Sampling Installed General Information Channels Speed Memory DN6.441-12 16 Bit 12 channels 130 MS/s 512 MS/channel The digitizerNETBOX DN6.44x series allows recording of DN6.441-16 16 Bit 16 channels 130 MS/s 512 MS/channel up to 24 channels with sampling rates of 500 MS/s. These DN6.441-20 16 Bit 20 channels 130 MS/s 512 MS/channel Ethernet Remote instruments offer outstanding A/D features DN6.441-24 16 Bit 24 channels 130 MS/s 512 MS/channel both in resolution and signal quality. The combination of DN6.442-12 16 Bit 12 channels 250 MS/s 512 MS/channel DN6.442-16 16 Bit 16 channels 250 MS/s 512 MS/channel high sampling rate and resolution makes these digitizers DN6.442-20 16 Bit 20 channels 250 MS/s 512 MS/channel the top-of-the-range for applications that require DN6.442-24 16 Bit 24 channels 250 MS/s 512 MS/channel high-quality signal acquisition DN6.445-12 14 Bit 12 channels 500 MS/s 512 MS/channel The digitizerNETBOX can be installed anywhere in the DN6.445-16 14 Bit 16 channels 500 MS/s 512 MS/channel company LAN and can be remotely controlled from a host DN6.445-20 14 Bit 20 channels 500 MS/s 512 MS/channel PC. DN6.445-24 14 Bit 24 channels 500 MS/s 512 MS/channel Export-Versions DN6.447-xx 16 Bit 12 to 24 channels 180 MS/s 512 MS/channel Sampling rate restricted versions that do not fall under export restrictions. DN6.448-xx 14 Bit 12 to 24 channels 400 MS/s 512 MS/channelSPECTRUM INSTRUMENTATION GMBH · AHRENSFELDER WEG 13-17 · 22927 GROSSHANSDORF · GERMANY 7.5.2020 PHONE: +49 (0)4102-6956-0 · FAX: +49 (0)4102-6956-66 · E-MAIL: info@spec.de · INTERNET: www.spectrum-instrumentation.com

digitizerNETBOX/generatorNETBOX. To maximize the compatibil- ity with existing IVI based software installations, the Spectrum IVI Software Support driver supports IVI Scope, IVI Digitizer and IVI FGen class with IVI- C and IVI-COM interfaces. Windows Support The digitizerNETBOX/generatorNETBOX can be accessed from Third-party Software Products Windows 7, Windows 8,Windows 10 (each 32 bit and 64 bit). Most popular third-party software products, such as LabVIEW, Programming examples for Visual C++, C++ Builder, LabWin- MATLAB or LabWindows/CVI are supported. All drivers come dows/CVI, Delphi, Visual Basic, VB.NET, C#, J#, Python, Java and with examples and detailed documentation. IVI are included. Embedded Webserver Linux Support The integrated webserver The digitizerNETBOX/generatorNETBOX can be access- follows the LXI standard ed from any Linux system. The Linux support includes SMP and gathers information systems, 32 bit and 64 bit systems, versatile program- on the product, set up of ming examples for Gnu C++, Python as well as drivers for the Ethernet configuration MATLAB for Linux. SBench 6, the powerful data acquisi- and current status. It also tion and analysis software from Spectrum is also included as a Linux allows the setting of a con- version. figuration password, ac- cess to documentation Discovery Protocol and updating of the com- The Discovery function plete instrument firmware, helps you to find and including the embedded identify any Spectrum LXI remote server and the instruments, like the webserver. digitizerNETBOX and generatorNETBOX, avail- Hardware features and options able to your computer on the network. The Discovery function will also locate any Spectrum card products that are managed by an installed Spectrum Remote Server somewhere on the network. LXI Instrument The digitizerNETBOX and After running the discovery function the card information is cached generatorNETBOX are fully and can be directly accessed by SBench 6. Furthermore the quali- LXI instrument compatible fied VISA address is returned and can be used by any software to to LXI Core 2011 following access the remote instrument. the LXI Device Specification 2011 rev. 1.4. The digitizerNETBOX/generatorNETBOX has been tested and approved by the LXI Consortium. SBench 6 Professional The digitizerNETBOX and Located on the front panel is the main on/off switch, LEDs showing generatorNETBOX can be used the LXI and Acquisition status and the LAN reset switch. with Spectrum’s powerful software SBench 6 – a Professional license Front Panel for the software is already in- stalled in the box. SBench 6 sup- Standard SMA connectors are used for ports all of the standard features of all analog input signals and all trigger the instrument. It has a variety of and clock signals. No special adapter display windows as well as analy- cables are needed and the connection is sis, export and documentation secure even when used in a moving envi- functions. ronment. • Available for Windows XP, Vista, Windows 7, Windows 8, Custom front panels are available on re- Windows 10 and Linux quest even for small series, be it BNC, LEMO connectors or custom • Easy to use interface with drag and drop, docking windows and specific connectors. context menus • Display of analog and digital data, X-Y display, frequency Ethernet Connectivity domain and spread signals The GBit Ethernet connection can be • Designed to handle several GBytes of data used with standard COTS Ethernet • Fast data preview functions cabling. The integration into a stan- dard LAN allows to connect the IVI Driver digitizerNETBOX/generatorNET- BOX either directly to a desktop PC The IVI standards define an open driver architecture, a set of instru- or Laptop or it is possible to place ment classes, and shared software components. Together these pro- the instrument somewhere in the vide critical elements needed for instrument interchangeability. IVI's company LAN and access it from any desktop over the LAN. defined Application Programming Interfaces (APIs) standardize common measurement functions reducing the time needed to learn a new IVI instrument. Boot on Power on Option The digitizerNETBOX/generatorNETBOX can be factory config- The Spectrum products to be accessed with the IVI driver can be lo- ured to automatically start and boot upon availability of the input cally installed data acquisition cards, remotely installed data acqui- power rail. That way the instrument will automatically become sition cards or remote LXI instruments like available again upon loss of input power.

Input Amplifier short pulses. In addition to this a re-arming mode (for accurate trig- The analog inputs can be adapt- ger recognition on noisy signals) the AND/OR conjunction of dif- ed to real world signals using a ferent trigger events is possible. As a unique feature it is possible to wide variety of settings that are use deactivated channels as trigger sources. individual for each channel. By using software commands the in- External trigger input put termination can be changed All boards can be triggered using up to two external analog or dig- between 50 Ohm and 1 MOhm, one can select a matching input ital signals. One external trigger input has two analog comparators range and the signal offset can be compensated by programmable that can define an edge or window trigger, a hysteresis trigger or AC coupling. The latest hardware revisions additionally allow for a rearm trigger. The other input has one comparator that can be offset compensation for DC-coupled inputs as well. used for standard edge and level triggers. Software selectable input path Multiple Recording For each of the analog channels the user has the choice between The Multiple Recording two analog input paths. The „Buffered“ path offers the highest flex- mode allows the recording of ibility when it comes to input ranges and termination. A software several trigger events with an programmable 50 Ohm and 1 MOhm termination also allows to extremely short re-arming connect standard oscilloscope probes to the card. The „50 Ohm“ time. The hardware doesn’t path on the other hand provides the highest bandwidth and the best need to be restarted in be- signal integrity with a fewer number of input ranges and a fixed 50 tween. The on-board memory is divided in several segments of the Ohm termination. same size. Each of them is filled with data if a trigger event occurs. Pre- and posttrigger of the segments can be programmed. The num- Software selectable lowpass filter ber of acquired segments is only limited by the used memory and Each analog channel contains a software selectable low-pass filter is unlimited when using FIFO mode. to limit the input bandwidth. Reducing the analog input bandwidth results in a lower total noise and can be useful especially with low Gated Sampling voltage input signals. The Gated Sampling mode allows data recording con- Automatic on-board calibration trolled by an external gate Every channel of each card is calibrated in the factory before the signal. Data is only record- board is shipped. However, to compensate for environmental vari- ed if the gate signal has a ations like PC power supply, temperature and aging the software programmed level. In addi- driver includes routines for automatic offset and gain calibration. tion a pre-area before start This calibration is performed on all input ranges of the "Buffered" of the gate signal as well as a post area after end of the gate signal path and uses a high precision onboard calibration reference. can be acquired. The number of gate segments is only limited by the used memory and is unlimited when using FIFO mode. Digital inputs This option acquires additional syn- Timestamp chronous digital channels phase- The timestamp function stable with the analog data. As de- writes the time positions of fault a maximum of 3 additional the trigger events in an extra digital inputs are available on the front plate of the card using the memory. The timestamps are multi-purpose I/O lines. An additional option offers 16 more digital relative to the start of record- channels. ing, a defined zero time, ex- ternally synchronized to a radio clock, an IRIG-B a GPS receiver. Ring buffer mode Using the external synchronization gives a precise time relation for acquisitions of systems on different locations. The ring buffer mode is the standard mode of all oscillo- scope instruments. Digitized ABA mode data is continuously written The ABA mode com- into a ring memory until a bines slow continuous trigger event is detected. After the trigger, post-trigger samples are data recording with fast recorded and pre-trigger samples can also be stored. The number acquisition on trigger of pre-trigger samples available simply equals the total ring mem- events. The ABA mode ory size minus the number of post trigger samples. works like a slow data logger combined with a FIFO mode fast digitizer. The exact position of the trigger events is stored as timestamps in an extra The FIFO mode is designed for continuous data transfer between re- memory. mote instrument and PC memory or hard disk. The control of the data stream is done automatically by the driver on interrupt request. The complete installed on-board memory is used for buffer data, Boxcar Average (high-resolution) mode making the continuous streaming extremely reliable. The Boxcar average or high- resolution mode is a form of Channel trigger averaging. The ADC over- samples the signal and aver- The data acquisition instruments offer a wide variety of trigger ages neighboring points modes. Besides the standard signal checking for level and edge as together. This mode uses a known from oscilloscopes it’s also possible to define a window trig- real-time boxcar averaging ger. All trigger modes can be combined with the pulsewidth trigger. algorthm that helps reducing This makes it possible to trigger on signal errors like too long or too random noise. It also can

yield a higher number of bits of resolution depening on the signal lance/logger application which can run totally independent for acquired. The averaging factor can be set in the region of 2 to 256. days and send notification emails only over LAN or offloads stored Averaged samples are stored as 32 bit values and can be pro- data as soon as it’s connected again. cessed by any software. The trigger detection is still running with full sampling speed allowing a very precise relation between ac- Access to the embedded server is done through a standard text quired signal and the trigger. based Linux shell based on the ssh secure shell. 8bit Sample reduction (low-resolution) mode External clock input and output The cards and digitizerNETBOXes of the 44xx series allow to op- Using a dedicated connector a sampling clock can be fed in from tionally reduce the resolution of the A/D samples from their native an external system. Additionally it’s also possible to output the in- 14 bit or 16 bit down to 8bit resolution, such that each sample will ternally used sampling clock on a separate connector to synchro- only occupy one byte in memory instead of the standard two bytes nize external equipment to this clock. required. This does not only enhance the size of the on-board mem- ory from 2 GSamples to effectively 4 Gsamples, but also reduces Reference clock the required bandwidth over the PCIe bus and also to the storage The option to use a precise devices, such as SSD or HDD. external reference clock (normally 10 MHz) is nec- Firmware Option Block Average essary to synchronize the The Block Average Module im- instrument for high-quality proves the fidelity of noisy re- measurements with external equipment (like a signal source). It’s petitive signals. Multiple also possible to enhance the quality of the sampling clock in this repetitive acquisitions with way. The driver automatically generates the requested sampling very small dead-time are accu- clock from the fed in reference clock. mulated and averaged. Ran- dom noise is reduced by the averaging process improving Export Versions the visibility of the repetitive signal. The complete averaging pro- cess is done inside the FPGA of the digitizer generating no CPU Special export versions of the products are available that do not fall load at all. The amount of data is greatly decreased as well as the under export control. Products fall under export control if their spec- needed transfer bandwidth is heavily reduced. ification exceeds certain sampling rates at a given A/D resolution and if the product is shipped into a country where no general ex- Please see separate data sheet for details on the firmware option. port authorization is in place. The export versions of the products have a sampling rate limitation Firmware Option Block Statistics (Peak Detect) matching the export control list. An upgrade to the faster version is The Block Statistics and Peak not possible. The sampling rate limitation is in place for both inter- Detect Module implements a nal and external clock. widely used data analysis and reduction technology in hard- ware. Each block is scanned for minimum and maximum peak and a summary includ- ing minimum, maximum, aver- age, timestamps and position information is stored in memory. The complete averaging process is done inside the FPGA of the digitiz- er generating no CPU load at all. The amount of data is greatly de- creased as well as the needed transfer bandwidth is heavily reduced. Please see separate data sheet for details on the firmware option. Option Embedded Server The option turns the digitizer- NETBOX/generatorNETBOX in a powerful PC that allows to run own programs on a small and remote data acquisition system. The digitizerNET- BOX/generatorNETBOX is en- hanced by more memory, a powerful CPU, a freely accessable internal SSD and a remote software development access method. The digitizerNETBOX/generatorNETBOX can either run connected to LAN or it can run totally independent, storing data to the internal SSD. The original digitizerNETBOX/generatorNETBOX remote in- strument functionality is still 100 % available. Running the embed- ded server option it is possible to pre-calculate results based on the acquired data, store acquisitions locally and to transfer just the re- quired data or results parts in a client-server based software struc- ture. A different example for the digitizerNETBOX/generatorNETBOX embedded server is surveil-

DN2 / DN6 Technical Data Analog Inputs Resolution 130 MS/s up to 250 MS/s 16 bit (441, 442, 447) 400 MS/s and 500 MS/s 14 bit (445, 448) Input Type Single-ended ADC Differential non linearity (DNL) ADC only ±0.5 LSB (14 Bit ADC), ±0.4 LSB (16 Bit ADC) ADC Integral non linearity (INL) ADC only ±2.5 LSB (14 Bit ADC), ±10.0 LSB (16 Bit ADC) ADC Word Error Rate (WER) max. sampling rate 10-12 Channel selection software programmable 1, 2, or 4 (maximum is model dependent) Bandwidth filter activate by software 20 MHz bandwidth with 3rd order Butterworth filtering Input Path Types software programmable 50 Ω (HF) Path Buffered (high impedance) Path Analog Input impedance software programmable 50 Ω 1 MΩ || 25 pF or 50 Ω Input Ranges software programmable ±500 mV, ±1 V, ±2.5 V, ±5 V ±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V, ±10 V Programmable Input Offset Frontend HW-Version < V9 not available not available Programmable Input Offset Frontend HW-Version >= V9 –100%..0% on all ranges –100%..0% on all ranges except ±1 V and ±10 V Input Coupling software programmable AC/DC AC/DC Offset error (full speed) after warm-up and calibration < 0.1% of range < 0.1% of range Gain error (full speed) after warm-up and calibration < 1.0% of reading < 1.0% of reading Over voltage protection range ≤ ±1V 2 Vrms ±5 V (1 MΩ), 5 Vrms (50 Ω) Over voltage protection range ≥ ±2V 6 Vrms ±30 V (1 MΩ), 5 Vrms (50 Ω) Max DC voltage if AC coupling active ±30 V ±30 V Relative input stage delay Bandwidth filter disabled: 0 ns Bandwidth filter disabled: 3.8 ns Bandwidth filter enabled: 14.7 ns Bandwidth filter enabled: 18.5 ns Crosstalk 1 MHz sine signal range ±1V ≤96 dB ≤93 dB Crosstalk 20 MHz sine signal range ±1V ≤82 dB ≤82 dB Crosstalk 1 MHz sine signal range ±5V ≤97 dB ≤85 dB Crosstalk 20 MHz sine signal range ±5V ≤82 dB ≤82 dB M4i.441x M4i.442x M4i.445x M4i.447x M4i.448x M4x.441x M4x.442x M4x.445x M4x.447x M4x.448x DN2.441-xx DN2.442-xx DN2.445-xx DN2.447-xx DN2.448-xx DN6.441-xx DN6.442-xx DN6.445-xx DN6.447-xx DN6.448-xx lower bandwidth limit (DC coupling) 0 Hz 0 Hz 0 Hz 0 Hz 0 Hz lower bandwidth limit (AC coupled, 50 Ω) < 30 kHz < 30 kHz < 30 kHz < 30 kHz < 30 kHz lower bandwidth limit (AC coupled, 1 MΩ) < 2 Hz < 2 Hz < 2 Hz < 2 Hz < 2 Hz -3 dB bandwidth (HF path, AC coupled, 50 Ω) 65 MHz 125 MHz 250 MHz 125 MHz 250 MHz Flatness within ±0.5 dB (HF path, AC coupled, 50 Ω) 40 MHz 80 MHz 160 MHz 80 MHz 160 MHz -3 dB bandwidth (Buffered path, DC coupled, 1 MΩ) 50 MHz 85 MHz 85 MHz (V1.1) 85 MHz 125 MHz (V1.2) 125 MHz (V1.2) -3 dB bandwidth (bandwidth filter enabled) 20 MHz 20 MHz 20 MHz 20 MHz 20 MHz Trigger Available trigger modes software programmable Channel Trigger, External, Software, Window, Re-Arm, Or/And, Delay, PXI (M4x only) Channel trigger level resolution software programmable 14 bit Trigger engines 1 engine per channel with two individual levels, 2 external triggers Trigger edge software programmable Rising edge, falling edge or both edges Trigger delay software programmable 0 to (8GSamples - 16) = 8589934576 Samples in steps of 16 samples Multi, Gate, ABA: re-arming time 40 samples (+ programmed pretrigger) Pretrigger at Multi, ABA, Gate, FIFO, Boxcar software programmable 16 up to [8192 Samples in steps of 16) Posttrigger software programmable 16 up to 8G samples in steps of 16 (defining pretrigger in standard scope mode) Memory depth software programmable 32 up to [installed memory / number of active channels] samples in steps of 16 Multiple Recording/ABA segment size, Boxcar software programmable 32 up to [installed memory / 2 / active channels] samples in steps of 16 Trigger accuracy (all sources) 1 sample Boxcar (high-resolution) average factor software programmable 2, 4, 8, 16, 32, 64, 128 or 256 Timestamp modes software programmable Standard, Startreset, external reference clock on X0 (e.g. PPS from GPS, IRIG-B) Data format Std., Startreset: 64 bit counter, increments with sample clock (reset manually or on start) RefClock: 24 bit upper counter (increment with RefClock) 40 bit lower counter (increments with sample clock, reset with RefClock) Extra data software programmable none, acquisition of X0/X1/X2 inputs at trigger time, trigger source (for OR trigger) Size per stamp 128 bit = 16 bytes External trigger Ext0 Ext1 External trigger impedance software programmable 50 Ω /1 kΩ 1 kΩ External trigger coupling software programmable AC or DC fixed DC External trigger type Window comparator Single level comparator External input level ±10 V (1 kΩ), ±2.5 V (50 Ω), ±10 V

Trigger edge software programmable Rising edge, falling edge or both edges External trigger sensitivity 2.5% of full scale range 2.5% of full scale range = 0.5 V (minimum required signal swing) External trigger level software programmable ±10 V in steps of 10 mV ±10 V in steps of 10 mV External trigger maximum voltage ±30V ±30 V External trigger bandwidth DC 50 Ω DC to 200 MHz n.a. 1 kΩ DC to 150 MHz DC to 200 MHz External trigger bandwidth AC 50 Ω 20 kHz to 200 MHz n.a. Minimum external trigger pulse width ≥ 2 samples ≥ 2 samples Frequency Response M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx Sampling Rate 500 MS/s HF Path 50 Ω, AC coupling, no filter Buffered Path 1 MΩ, AC Coupling, no filter Frequency Response M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx Sampling Rate 250 MS/s HF Path 50 Ω, AC coupling, no filter Buffered Path 1 MΩ, AC Coupling, no filter Frequency Response M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx Sampling Rate 130 MS/s HF Path 50 Ω, AC coupling, no filter Buffered Path 1 MΩ, AC Coupling, no filter

Clock Clock Modes software programmable internal PLL, external reference clock, Star-Hub sync (M4i only), PXI Reference Clock (M4x only) Internal clock accuracy ≤ ±20 ppm Internal clock setup granularity standard clock mode divider: maximum sampling rate divided by: 1, 2, 4, 8, 16, ... up to 131072 (full gain accuracy) Internal clock setup granularity special clock mode only 1 Hz (reduced gain accuracy when using special clock mode), not available when synchroniz- ing multiple cards Clock setup range gaps special clock mode only unsetable clock speeds: 17.5 MHz to 17.9 MHz, 35.1 MHz to 35.8 MHz, 70 MHz to 72 MHz, 140 MHz to 144 MHz, 281 MHz to 287 MHz External reference clock range software programmable ≥ 10 MHz and ≤ 1 GHz External reference clock input impedance 50 Ω fixed External reference clock input coupling AC coupling External reference clock input edge Rising edge External reference clock input type Single-ended, sine wave or square wave External reference clock input swing 0.3 V peak-peak up to 3.0 V peak-peak External reference clock input max DC voltage ±30 V (with max 3.0 V difference between low and high level) External reference clock input duty cycle requirement 45% to 55% Internal ADC clock output type Single-ended, 3.3V LVPECL Internal ADC clock output frequency standard clock mode Fixed to maximum sampling rate (500 MS/s, 250 MS/s or 130 MS/s depending on type) Internal ADC clock output frequency special clock mode 445x models (500 MS/s): ADC clock in the range between 80 MS/s and 500 MS/s 448x models (400 MS/s): ADC clock in the range between 80 MS/s and 400 MS/s 442x models (250 MS/s): ADC clock in the range between 40 MS/s and 250 MS/s 447x models (180 MS/s): ADC clock in the range between 40 MS/s and 180 MS/s 441x models (130 MS/s): ADC clock in the range between 40 MS/s and 130 MS/s Star-Hub synchronization clock modes software selectable Standard clock mode with internal reference (maxmimum clock + divider), Standard clock mode with external reference (maxmimum clock + divider) special clock mode not allowed, except: 445 series (500 MS/s) can also run with 400 MS/s and divided clock for synchronization 442 series (250 MS/s) can also run with 180 MS/s and divided clock for synchronization ABA mode clock divider for slow clock software programmable 16 up to (128k - 16) in steps of 16 Channel to channel skew on one card < 60 ps (typical) Skew between star-hub synchronized cards < 130 ps (typical, preliminary) M4i.441x M4i.442x M4i.445x M4i.447x M4i.448x M4x.441x M4x.442x M4x.445x M4x.447x M4x.448x DN2.441-xx DN2.442-xx DN2.445-xx DN2.447-xx DN2.448-xx DN6.441-xx DN6.442-xx DN6.445-xx DN6.447-xx DN6.448-xx ADC Resolution 16 bit 16 bit 14 bit 16 bit 14 bit max sampling clock 130 MS/s 250 MS/s 500 MS/s 180 MS/s 400 MS/s min sampling clock (standard clock mode) 3.814 kS/s 3.814 kS/s 3.814 kS/s 3.814 kS/s 3.814 kS/s min sampling clock (special clock mode) 0.610 kS/s 0.610 kS/s 0.610 kS/s 0.610 kS/s 0.610 kS/s Block Average Signal Processing Option M4i.44xx/M4x.44xx/DN2.44x/DN6.44x Series Firmware ≥ V1.14 (since August 2015) Firmware < V1.14 Minimum Waveform Length 32 samples 32 samples Minimum Waveform Stepsize 16 samples 16 samples Maximum Waveform Length 1 channel active 128 kSamples 32 kSamples Maximum Waveform Length 2 channels active 64 kSamples 16 kSamples Maximum Waveform Length 4 or more channels active 32 kSamples 8 kSamples Minimum Number of Averages 2 2 Maximum Number of Averages 65536 (64k) 65536 (64k) Data Output Format fixed 32 bit signed integer 32 bit signed integer Re-Arming Time between waveforms 40 samples (+ programmed pretrigger) 40 samples (+ programmed pretrigger) Re-Arming Time between end of average to start of Depending on programmed segment length, 40 samples (+ programmed pretrigger) next average max 100 µs Block Statistics Signal Processing Option M4i.44xx/M4x.44xx/DN2.44x/DN6.44x Series Minimum Waveform Length 32 samples Minimum Waveform Stepsize 16 samples Maximum Waveform Length Standard Acquisition 2 GSamples / channels Maximum Waveform Length FIFO Acquisition 2 GSamples Data Output Format fixed 32 bytes statistics summary Statistics Information Set per Waveform Average, Minimum, Maximum, Position Minimum, Position Maximum, Trigger Timestamp Re-Arming Time between Segments 40 samples (+ programmed pretrigger)

Multi Purpose I/O lines (front-plate) Number of multi purpose lines three, named X0, X1, X2 Input: available signal types software programmable Asynchronous Digital-In, Synchronous Digital-In, Timestamp Reference Clock Input: impedance 10 kΩ to 3.3 V Input: maximum voltage level -0.5 V to +4.0 V Input: signal levels 3.3 V LVTTL Input: bandwith 125 MHz Output: available signal types software programmable Asynchronous Digital-Out, Trigger Output, Run, Arm, PLL Refclock, System Clock Output: impedance 50 Ω Output: signal levels 3.3 V LVTTL Output: type 3.3V LVTTL, TTL compatible for high impedance loads Output: drive strength Capable of driving 50 Ω loads, maximum drive strength ±48 mA Output: update rate 14bit, 16 bit ADC resolution sampling clock Output: update rate 8 bit ADC resolution Current sampling clock < 1.25 GS/s : sampling clock Current sampling clock > 1.25 GS/s and < 2.50 GS/s : ½ sampling clock Current sampling clock > 2.50 GS/s and < 5.00 GS/s : ¼ sampling clock Connectors Analog Channels SMA female (one for each single-ended input) Cable-Type: Cab-3mA-xx-xx Clock Input SMA female Cable-Type: Cab-3mA-xx-xx Clock Output SMA female Cable-Type: Cab-3mA-xx-xx Trg0 Input SMA female Cable-Type: Cab-3mA-xx-xx Trg1 Input SMA female Cable-Type: Cab-3mAxx-xx X0/Trigger Output/Timestamp Reference Clock programmable direction SMA female Cable-Type: Cab-3mA-xx-xx X1 programmable direction SMA female Cable-Type: Cab-3mA-xx-xx X2 programmable direction SMA female Cable-Type: Cab-3mA-xx-xx Option digitizerNETBOX/generatorNETBOX embedded server (DN2.xxx-Emb, DN6.xxx-Emb) CPU Intel Quad Core 2 GHz System memory 4 GByte RAM System data storage Internal 128 GByte SSD Development access Remote Linux command shell (ssh), no graphical interface (GUI) available Accessible Hardware Full access to Spectrum instruments, LAN, front panel LEDs, RAM, SSD Integrated operating system OpenSuse 12.2 with kernel 4.4.7. Internal PCIe connection DN2.20, DN2.46, DN2.47, DN2.49, DN2.59, DN2.60 PCIe x1, Gen1 DN6.46, DN6.49, DN6.59 DN2.22, DN2.44, DN2.66 PCIe x1, Gen2 DN6.22, DN6.44, DN6.66 Ethernet specific details LAN Connection Standard RJ45 LAN Speed Auto Sensing: GBit Ethernet, 100BASE-T, 10BASE-T LAN IP address programmable DHCP (IPv4) with AutoIP fall-back (169.254.x.y), fixed IP (IPv4) Sustained Streaming speed DN2.20, DN2.46, DN2.47, DN2.49, DN2.60 up to 70 MByte/s DN6.46, DN6.49 DN2.59, DN2.22, DN2.44, DN2.66 up to 100 MByte/s DN6.59, DN6.22, DN6.44, DN6.66 Used TCP/UDP Ports Webserver: 80 mDNS Daemon: 5353 VISA Discovery Protocol: 111, 9757 UPNP Daemon: 1900 Spectrum Remote Server: 1026, 5025 Power connection details Mains AC power supply Input voltage: 100 to 240 VAC, 50 to 60 Hz AC power supply connector IEC 60320-1-C14 (PC standard coupler) Power supply cord power cord included for Schuko contact (CEE 7/7) Serial connection details (DN2.xxx with hardware ≥ V11) Serial connection (RS232) For diagnostic purposes only. Do not use, unless being instructed by a Spectrum support agent. Certification, Compliance, Warranty EMC Immunity Compliant with CE Mark EMC Emission Compliant with CE Mark Product warranty 5 years starting with the day of delivery Software and firmware updates Life-time, free of charge

RMS Noise Level (Zero Noise), typical figures M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V Voltage resolution 24.4 µV 61.0 µV 122.1 µV 244.1 µV 305.2 µV 610.4 µV 1.22 mV HF path, DC, fixed 50 Ω <1.9 LSB <116 µV <1.9 LSB <232 µV <1.9 LSB <580 µV <1.9 LSB <1.16 mV Buffered path, full bandwidth <3.8 LSB <93 µV <2.7 LSB <165 µV <2.1 LSB <256 µV <3.8 LSB <928 µV <2.7 LSB <1.65 mV <2.0 LSB <2.44 mV Buffered path, BW limit active <2.2 LSB <54 µV <2.0 LSB <122 µV <2.0 LSB <244 µV <3.2 LSB <781 µV <2.3 LSB <1.40 mV <2.0 LSB <2.44 mV M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V Voltage resolution 6.1 µV 15.3 µV 30.5 µV 61.0 µV 76.3 µV 152.6 µV 305.2 µV HF path, DC, fixed 50 Ω <6.9 LSB <53 µV <6.9 LSB <211 µV <6.9 LSB <526 µV <6.9 LSB <1.05 mV Buffered path, full bandwidth <11 LSB <67 µV <7.8 LSB <119 µV <7.1 LSB <217 µV <12 LSB <732 µV <8.1 LSB <1.24 mV <7.1 LSB <2.17 mV Buffered path, BW limit active <7.9 LSB <48 µV <7.0 LSB <107 µV <6.9 LSB <211 µV <9.8 LSB <598 µV <7.2 LSB <1.10 mV <7.1 LSB <2.17 mV M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s Input Range ±200 mV ±500 mV ±1 ±2 V ±2.5 V ±5 V ±10 V Voltage resolution (1) 6.1 µV 15.3 µV 30.5 µV 61.0 µV 76.3 µV 152.6 µV 305.2 µV HF path, DC, fixed 50 Ω <5.9 LSB <90 µV <5.9 LSB <180 µV <5.9 LSB <450 µV <5.9 LSB <900 µV Buffered path, full bandwidth <8.5 LSB <52 µV <6.5 LSB <99 µV <5.9 LSB <180 µV <11 LSB <671 µV <7.0 LSB <1.07 mV <6.1 LSB <1.86 mV Buffered path, BW limit active <7.0 LSB <43 µV <6.1 LSB <93 µV <5.9 LSB <180 µV <9.6 LSB <586 µV <6.7 LSB <1.02 mV <6.1 LSB <1.86 mV Dynamic Parameters M4i.445x, M4x.445x, DN2.445-xx and DN6.445-xx, 14 Bit 500 MS/s M4i.448x, M4x.448x, DN2.448-xxx and DN6.448-xx, 14 Bit 400 MS/s Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW Test signal frequency 10 MHz 40 MHz 70 MHz 10 MHz 10 MHz 40 MHz 70 MHz Input Range ±500mV ±1V ±2.5V ±5V ±1V ±1V ±200mV ±500mV ±1V ±500mV ±500mV ±500mV THD (typ) (dB <-75.9 dB <-75.8 dB <-75.2 dB <-74.8 dB <-72.5 dB <-67.4 dB <-71.4 dB <-72.1 dB <-68.6 dB <-65.0 dB <-58.6 dB <-54.4 dB SNR (typ) (dB) >67.8 dB >67.9 dB >68.0 dB >68.0 dB >69.5 dB >67.5 dB >67.5 dB >68.0 dB >68.1 dB >67.3 dB >65.8 dB >65.6 dB SFDR (typ), excl. harm. (dB) >88.1 dB >88.6 dB >85.2 dB >85.3 dB >88.0 dB >87.8 dB >87.3 dB >88.4 dB >87.5 dB >89.0 dB >88.9 dB >88.8 dB SFDR (typ), incl. harm. (dB) >80.1 dB >80.0 dB >77.4 dB >77.3 dB >74.0 dB >69.9 dB >78.1 dB >73.5 dB >69.8 dB >67.5 dB >60.8 dB >56.0 dB SINAD/THD+N (typ) (dB) >67.2 dB >67.2 dB >67.2 dB >67.2 dB >67.7 dB >64.4 dB >66.5 dB >66.6 dB >65.3 dB >63.9 dB >57.9 dB >54.0 dB ENOB based on SINAD (bit) >10.9 bit >10.9 bit >10.9 bit >10.9 bit >10.9 bit >10.4 bit >10.7 bit >10.8 bit >10.6 bit >10.3 bit >9.3 bit >8.7 bit ENOB based on SNR (bit) >11.0 bit >11.0 bit >11.0 bit >11.0 bit >11.0 bit >10.9 bit >10.9 bit >11.0 bit >11.0 bit >10.9 bit >10.6 bit >10.6 bit M4i.442x, M4x.442x, DN2.442-xx and DN6.442-xx, 16 Bit 250 MS/s M4i.447x, M4x.447x, DN2.447-xx and DN6.447-xx, 16 Bit 180 MS/s Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW Test signal frequency 1 MHz 10 MHz 40 MHz 10 MHz 1 MHz 10 MHz 40 MHz Input Range ±1V ±500mV ±1V ±2.5V ±5V ±1V ±200mV ±500mV ±1V ±500mV ±500mV ±500mV THD (typ) (dB <-73.1 dB <-74.0 dB <-74.1 dB <-74.1 dB <-74.1 dB <-62.9 dB <-73.2 dB <-71.5 dB <-69.0 dB <-72.2 dB <-67.5 dB <49.8 dB SNR (typ) (dB) >71.9 dB >71.5 dB >71.5 dB >71.6 dB >71.6 dB >71.8 dB >69.8 dB >71.0 dB >71.2 dB >71.7 dB >71.0 dB >69.0 dB SFDR (typ), excl. harm. (dB) >92.1 dB >90.4 dB >90.8 dB >90.1 dB >89.7 dB >90.2 dB >92.1 dB >92.0 dB >92.1 dB >90.0 dB >91.4 dB >92.5 dB SFDR (typ), incl. harm. (dB) >74.4 dB >75.4 dB >75.5 dB >75.5 dB >75.5 dB >64.5 dB >75.0 dB >73.1 dB >69.8 dB >74.7 dB >67.8 dB >50.0 dB SINAD/THD+N (typ) (dB) >69.8 dB >69.6 dB >69.6 dB >69.6 dB >69.6 dB >62.2 dB >68.5 dB >68.2 dB >67.0 dB >68.8 dB >66.4 dB >48.9 dB ENOB based on SINAD (bit) >11.3 bit >11.2 bit >11.2 bit >11.3 bit >11.3 bit >10.0 bit >11.1 bit >11.0 bit >10.8 bit >11.1 dB >10.7 bit >7.8 bit ENOB based on SNR (bit) >11.7 bit >11.6 bit >11.6 bit >11.6 bit >11.6 bit >11.6 dB >11.3 bit >11.5 bit >11.5 bit >11.6 dB >11.5 bit >11.2 bit M4i.441x, M4x.441x, DN2.441-xx and DN6.441-xx, 16 Bit 130 MS/s Input Path HF path, AC coupled, fixed 50 Ohm Buffered path, BW limit Buffered path, full BW Test signal frequency 1 MHz 10 MHz 10 MHz 1 MHz 10 MHz Input Range ±1V ±500mV ±1V ±2.5V ±5V ±200mV ±500mV ±1V ±500mV ±500mV THD (typ) (dB <-72.6 dB <-77.8 dB <-77.5 dB <-77.3 dB <-77.1 dB <-74.5 dB <-73.9 dB <-70.1 dB <-73.5 dB <73.4 dB SNR (typ) (dB) >72.2 dB >71.8 dB >71.9 dB >72.0 dB >72.0 dB >69.8 dB >71.2 dB >71.3 dB >71.1 dB >71.0 dB SFDR (typ), excl. harm. (dB) >92.4 dB >97.0 dB >96.0 dB >95.2 dB >94.8 dB >89.0 dB >94.0 dB >94.5 dB >88.8 dB >93.5 dB SFDR (typ), incl. harm. (dB) >73.7 dB >78.6 dB >78.2 dB >75.2 dB >75.1 dB >77.6 dB >77.8 dB >71.5 dB >74.7 dB >73.1 dB SINAD/THD+N (typ) (dB) >69.4 dB >70.8 dB >70.8 dB >70.9 dB >70.8 dB >69.0 dB >69.7 dB >68.2 dB >69.2 dB >69.2 dB ENOB based on SINAD (bit) >11.2 bit >11.5 bit >11.5 bit >11.5 bit >11.5 bit >11.2 bit >11.3 bit >11.0 bit >11.2 bit >11.2 bit ENOB based on SNR (bit) >11.7 bit >11.6 bit >11.6 bit >11.6 bit >11.6 bit >11.3 bit >11.5 bit >11.5 bit >11.6 bit >11.6 bit Dynamic parameters are measured at ±1 V input range (if no other range is stated) and 50Ω termination with the samplerate specified in the table. Measured parameters are averaged 20 times to get typical values. Test signal is a pure sine wave generated by a signal generator and a matching bandpass filter. Amplitude is >99% of FSR. SNR and RMS noise parameters may differ depending on the quality of the used PC. SNR = Signal to Noise Ratio, THD = Total Harmonic Distortion, SFDR = Spurious Free Dynamic Range, SINAD = Signal Noise and Dis- tortion, ENOB = Effective Number of Bits.

Noise Floor Plots (open inputs) M4i.445x, M4x.445x, M4i.442x, M4x.442x, M4i.441x, M4x.441x, DN2.445-xx, DN6.445-xx DN2.442-xx and DN6.442-xx DN2.441-xx and DN6.441-xx Sampling Rate 500 MS/s Sampling Rate 250 MS/s Sampling Rate 130 MS/s Buffered Path 1 MΩ, AC ±1 V range HF Path 50 Ω, AC ±500 mV DN6 specific Technical Data Environmental and Physical Details DN6.xxx Dimension of Chassis without connectors or bumpers L x W x H 464 mm x 431 mm x 131 mm Dimension of Chassis with 19“ rack mount option L x W x H 464 mm x TBD mm x 131 mm (3U height) Weight (3 internal acquisition/generation modules) 12.1 kg, with rack mount kit: TBD kg Weight (4 internal acquisition/generation modules) 12.5 kg, with rack mount kit: TBD kg Weight (5 internal acquisition/generation modules) 12.9 kg, with rack mount kit: TBD kg Weight (6 internal acquisition/generation modules) 13.4 kg, with rack mount kit: TBD kg Warm up time 10 minutes Operating temperature 0°C to 40°C Storage temperature -10°C to 70°C Humidity 10% to 90% Dimension of packing (single DN6) L x W x H 580 mm x 580 mm x 280 mm Volume weight of Packing (single DN6) 19.0 kgs Power Consumption 230 VAC 12 channel versions TBD TBD 16 channel versions TBD TBD 20 channel versions TBD TBD 24 channel versions TBD TBD MTBF MTBF TBD hours

Block diagram of digitizerNETBOX DN6 • The number of maximum channels and internal digitizer modules and existance of a synchronization Star-Hub is model dependent. Block diagram of digitzerNETBOX module DN6.44x

Order Information The digitizerNETBOX is equipped with a large internal memory for data storage and supports standard acquisition (Scope), FIFO acquisition (streaming), Multiple Recording, Gated Sampling, ABA mode and Timestamps. Operating system drivers for Windows/Linux 32 bit and 64 bit, drivers and examples for C/C++, IVI (Scope and Digitizer class), LabVIEW (Windows), MATLAB (Windows and Linux), .NET, Delphi, Java, Python and a Professional license of the oscilloscope software SBench 6 are included. The system is delivered with a connection cable meeting your countries power connection. Additional power connections with other standards are available as option. digitizerNETBOX DN6 - Ethernet/LXI Interface Order no. A/D Single-Ended Differential Sampling Speed Installed Available Resolution Channels Channels Memory Memory Options DN6.441-12 16 Bit 12 channels - 130 MS/s 512 MS/channel - DN6.441-16 16 Bit 16 channels - 130 MS/s 512 MS/channel - DN6.441-20 16 Bit 20 channels - 130 MS/s 512 MS/channel - DN6.441-24 16 Bit 24 channels - 130 MS/s 512 MS/channel - DN6.442-12 16 Bit 12 channels - 250 MS/s 512 MS/channel - DN6.442-16 16 Bit 16 channels - 250 MS/s 512 MS/channel - DN6.442-20 16 Bit 20 channels - 250 MS/s 512 MS/channel - DN6.442-24 16 Bit 24 channels - 250 MS/s 512 MS/channel - DN6.445-12 14 Bit 12 channels - 500 MS/s 512 MS/channel - DN6.445-16 14 Bit 16 channels - 500 MS/s 512 MS/channel - DN6.445-20 14 Bit 20 channels - 500 MS/s 512 MS/channel - DN6.445-24 14 Bit 24 channels - 500 MS/s 512 MS/channel - DN6.447-12(1) 16 Bit 12 channels - 180 MS/s 512 MS/channel - DN6.447-16(1) 16 Bit 16 channels - 180 MS/s 512 MS/channel - DN6.447-20(1) 16 Bit 20 channels - 180 MS/s 512 MS/channel - DN6.447-24(1) 16 Bit 24 channels - 180 MS/s 512 MS/channel - DN6.448-12(1) 14 Bit 12 channels - 400 MS/s 512 MS/channel - DN6.448-16(1) 14 Bit 16 channels - 400 MS/s 512 MS/channel - DN6.448-20(1) 14 Bit 20 channels - 400 MS/s 512 MS/channel - DN6.448-24(1) 14 Bit 24 channels - 400 MS/s 512 MS/channel - (1) Export Version Options Order no. Option DN6.xxx-Rack 19“ rack mounting set for self mounting DN6.xxx-Emb Extension to Embedded Server: CPU, more memory, SSD. Access via remote Linuxs secure shell (ssh) DN6.xxx-spavg Signal Processing Firmware Option: Block Average (later installation by firmware - upgrade available) DN6.xxx-spstat Signal Processing Firmware Option: Block Statistics/Peak Detect (later installation by firmware - upgrade available) DN6.xxx-BTPWR Boot on Power On: the digitizerNETBOX/generatorNETBOX automatically boots if power is switched on. Calibration Order no. Option DN6.xxx-Recal Recalibration of complete digitizerNETBOX/generatorNETBOX DN6 including calibration protocol Standard SMA Cables The standard adapter cables are based on RG174 cables and have a nominal attenuation of 0.3 dB/m at 100 MHz and 0.5 dB/m at 250 MHz. For high speed signals we recommend the low loss cables series CHF. for Connections Connection Length to BNC male to BNC female to SMB female to MMCX male to SMA male All SMA male 80 cm Cab-3mA-9m-80 Cab-3mA-9f-80 Cab-3f-3mA-80 Cab-1m-3mA-80 Cab-3mA-3mA-80 All SMA male 200 cm Cab-3mA-9m-200 Cab-3mA-9f-200 Cab-3f-3mA-200 Cab-1m-3mA-200 Cab-3mA-3mA-200 Probes (short) SMA male 5 cm Cab-3mA-9f-5 Low Loss SMA Cables The low loss adapter cables are based on MF141 cables and have an attenuation of 0.3 dB/m at 500 MHz and 0.5 dB/m at 1.5 GHz. They are recommended for signal frequencies of 200 MHz and above. Order no. Option CHF-3mA-3mA-200 Low loss cables SMA male to SMA male 200 cm CHF-3mA-9m-200 Low loss cables SMA male to BNC male 200 cm Technical changes and printing errors possible SBench, digitizerNETBOX and generatorNETBOX are registered trademarks of Spectrum Instrumentation GmbH. Microsoft, Visual C++, Windows, Windows 98, Windows NT, Window 2000, Windows XP, Windows Vista, Windows 7, Windows 8 and Windows 10 are trademarks/registered trademarks of Microsoft Corporation. LabVIEW, DASYLab, Diadem and LabWindows/CVI are trademarks/registered trademarks of National Instruments Corporation. MATLAB is a trademark/registered trademark of The Mathworks, Inc. Delphi and C++Builder are trademarks/registered trademarks of Embarcadero Technologies, Inc. Keysight VEE, VEE Pro and VEE OneLab

are trademarks/registered trademarks of Keysight Technologies, Inc. FlexPro is a registered trademark of Weisang GmbH & Co. KG. PCIe, PCI Express and PCI-X and PCI-SIG are trademarks of PCI-SIG. LXI is a registered trademark of the LXI Consortium. PICMG and CompactPCI are trademarks of the PCI Industrial Computation Manufacturers Group. Oracle and Java are registered trademarks of Oracle and/or its affiliates. Intel and Intel Core i3, Core i5, Core i7, Core i9 and Xeon are trademarks and/or registered trademarks of Intel Corporation. AMD, Opteron, Sempron, Phenom, FX, Ryzen and EPYC are trademarks and/or registered trademarks of Advanced Micro Devices. NVIDIA, CUDA, GeForce, Quadro and Tesla are trademarks/registered trademarks of NVIDIA Corporation.